The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2008
Filed:
Oct. 21, 2005
Kimito Horie, Tokyo, JP;
Kimito Horie, Tokyo, JP;
Oki Electric Industry Co., Ltd., Tokyo, JP;
Abstract
A plurality of input circuits and a plurality of output circuits are connected to form a Boundary Scan Path Chain (BSPC). Part or all of the existing I/O bus is used as a test bus. When a test target system such as a logic circuit is tested, data of the input circuits is circulated in the BSPC to set the initial state. After a system clock is activated, data of the input circuits is loaded into shift registers provided in the input circuits or data of the output circuits is loaded into shift registers provided in the output circuits. A shift clock is activated to extract the data of the input or output circuits through the BSPC. Enable data is circulated in the BSPC, and data of the output circuits is supplied to the test bus only when the enable data is active.