The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2008

Filed:

Mar. 10, 2006
Applicants:

Jovica Savic, Downers Grove, IL (US);

Remy J. Chelini, Crystal Lake, IL (US);

Gregory J. Dunn, Arlington Heights, IL (US);

Inventors:

Jovica Savic, Downers Grove, IL (US);

Remy J. Chelini, Crystal Lake, IL (US);

Gregory J. Dunn, Arlington Heights, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 7/00 (2006.01); H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming embedded capacitors on a printed circuit board is disclosed. The capacitor is formed on the printed circuit board by a depositing a first dielectric layer over one or more electrodes situated on the PCB. Another electrode is formed on top of the first dielectric layer and a second dielectric layer is deposited on top of that electrode. A third electrode is formed on top of the second dielectric layer. The two dielectric layers are abrasively delineated in a single step by a method such as sand blasting to define portions of the first and second dielectric layers to create a multilayer capacitive structure.


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