The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2008
Filed:
May. 13, 2005
Matthew L. Welborn, Vienna, VA (US);
William M. Shvodian, McLean, VA (US);
Matthew L. Welborn, Vienna, VA (US);
William M. Shvodian, McLean, VA (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method () is provided for operating an interleaver circuithaving N shift lines (-). Each shift line has a line input node, a line output node, and one or more bit storage elements (). The method includes: storing don't-care bits in each bit storage element (); isolating the line output nodes from an interleaver output node (); receiving a stream of data bits at an interleaver input node (); and sequentially connecting the interleaver input node to respective line input nodes to shift the stream of data bits into the bit storage elements of corresponding shift lines in an interleaved fashion (). A don't-care bit is shifted out of each of the bit storage elements in corresponding shift lines as each data bit is shifted in. A last don't-care bit is shifted out of respective bit storage elements in the shift lines during N consecutively-received data bits.