The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2008

Filed:

Feb. 11, 2005
Applicants:

Frank D. Ferraiolo, New Windsor, NY (US);

Gary A. Peterson, Rochester, MN (US);

Robert J. Reese, Austin, TX (US);

Inventors:

Frank D. Ferraiolo, New Windsor, NY (US);

Gary A. Peterson, Rochester, MN (US);

Robert J. Reese, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus are disclosed for aligning received data bits in elastic interface systems. Depending upon which one of several alignment modes is selected, data bits can be loaded into FIFO latches on rising clock edges if the data was sent on rising clock edges, on falling clock edges if the data was sent on falling clock edges, or on the nearest clock edge if minimum latency is desired. Alternatively, data bits can be delayed by one or more bit times before loading into FIFO latches to reduce the elastic interface system's sensitivity to drift. The present invention permits a user to trade off factors related to for latency, drift, and skew by choosing among different alignment modes in an elastic interface system.


Find Patent Forward Citations

Loading…