The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2008

Filed:

Aug. 30, 2004
Applicants:

Michael Cuylen, Zirndorf, DE;

Dieter Horst, Cadolzburg, DE;

Inventors:

Michael Cuylen, Zirndorf, DE;

Dieter Horst, Cadolzburg, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/43 (2006.01); H03M 7/38 (2006.01); H03M 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for coding a sequence of data bits (B-B), at least one of said bits having a logical on value or a logical off value. The data bits are organized in a sequence of time slot frames (Fr-FR). At least one time slot frame has a plurality of time slots (ZS-ZS). Each of the plurality of times slots are capable of having an on value or an off value (Zor Z). The coding comprises preloading a time slot (ZSAF) from the plurality of time slots with an off value (Z). Each of the time slots (ZS-ZS) other than the preloaded time slot (ZS) are loaded with an on value or an off value to form a logical on value or logical off value for the at least one of said data bits. A time slot with an off value from the plurality of time slots always follows another time slot with an on value from the plurality of time slots. The logical on value is complementary to the logical off value.


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