The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2008
Filed:
Feb. 24, 2003
Applicants:
Platon Beletsky, Sunnyvale, CA (US);
Alon Kfir, San Jose, CA (US);
Tsair-chin Lin, Saratoga, CA (US);
Inventors:
Platon Beletsky, Sunnyvale, CA (US);
Alon Kfir, San Jose, CA (US);
Tsair-Chin Lin, Saratoga, CA (US);
Assignee:
Quickturn Design Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method and apparatus for debugging circuit designs having random access memory therein. The circuit design is emulated on a hardware logic emulator. The RAM emulated by the emulator can be rewound to a previous state, and then replayed. The RAM emulated by the emulator can also be reconstructed to a state the RAM maintained at some point during a trace window.