The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2008

Filed:

May. 31, 2005
Applicants:

John A. Maher, San Jose, CA (US);

Mitchell Grant Poplack, San Jose, CA (US);

Inventors:

John A. Maher, San Jose, CA (US);

Mitchell Grant Poplack, San Jose, CA (US);

Assignee:

Quickturn Design Systems Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01); G01R 27/28 (2006.01); G01R 31/00 (2006.01); G01R 31/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. Being reconfigurable to support an extensive range of conventional input/output technologies, the target interface system downloads a selected image associated with a desired input/output technology prior to runtime. The selected image identifies an appropriate output driver supply voltage, and any auxiliary voltages are controlled as functions of the output driver supply voltage to limit voltage inconsistencies. Defaulting each voltage to its least dangerous state when unprogrammed, the target interface system subsequently monitors the voltages, disabling the input/output connections if a problem is detected. The target interface system likewise detects when a selected system component is absent, unpowered, and/or wrongly powered and provides contention detection. Thereby, the target interface system can facilitate communication among the system components while inhibiting damage to the target interface system and/or the system components.


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