The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2008

Filed:

Aug. 09, 2005
Applicants:

Hiroki Morimura, Kanagawa, JP;

Satoshi Shigematsu, Kanagawa, JP;

Yukio Okazaki, Kanagawa, JP;

Katsuyuki Machida, Kanagawa, JP;

Inventors:

Hiroki Morimura, Kanagawa, JP;

Satoshi Shigematsu, Kanagawa, JP;

Yukio Okazaki, Kanagawa, JP;

Katsuyuki Machida, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 23/50 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
Abstract

A master latch () is formed from a static circuit, and a slave latch () is formed from a dynamic circuit. The number of circuit elements can be smaller as compared to a slave latch formed from a static circuit so that the size and area of a master-slave flip-flop can be reduced. Since the master latch is formed from a static circuit, data can be held stably during the standby time by setting the master latch in a data holding state.


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