The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2008
Filed:
Jun. 05, 2006
Applicants:
Amer Hani Atrash, Dallas, TX (US);
Reed Wilburn Adams, Plano, TX (US);
Inventors:
Amer Hani Atrash, Dallas, TX (US);
Reed Wilburn Adams, Plano, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract
A current mirror circuit that allows for over voltage stress testing includes: a first transistor; a second transistor having a gate coupled to a gate of the first transistor; a switch coupled between the gate of the first transistor and the drain of the first transistor; a bias source coupled to a control node of the switch such that the switch is ON during normal current mirror operation, and the switch is OFF during over voltage stress testing; and a clamp coupled between the control node of the switch and a source node.