The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2008

Filed:

Feb. 03, 2005
Applicant:

John Wood, Santa Cruz, CA (US);

Inventor:

John Wood, Santa Cruz, CA (US);

Assignee:

Multigig Inc., Scotts Valley, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 27/02 (2006.01); H03K 5/00 (2006.01); H03K 17/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A sampling circuit and method are disclosed. The sampling circuit includes a buffer, a holding capacitor, a set of switches, and at least two voltage references. The buffer drives buffered analog input signal via a first switch to a first node of holding capacitor. A second switch connects a second node of the holding capacitor to a first reference voltage. A third switch connects the second node of the holding capacitor to a second reference voltage. When the first and second switches are closed, charge accumulates on the holding capacitor. Opening the second switch terminates charging. The third switch biases the charged capacitor to the second reference voltage and the sampled output is taken from the first node of the holding capacitor. A rotary clock and control circuit provide the precise timing for the switches, especially the opening of the second switch, which determines the end of the sampling time.


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