The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2008
Filed:
Dec. 29, 2004
Hirotaka Morita, Kasugai, JP;
Shinji Fukasawa, Kasugai, JP;
Hirotaka Morita, Kasugai, JP;
Shinji Fukasawa, Kasugai, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
When carrying out placement and routing processing on a layout object circuit using circuit connectivity information and power supply information, a first step of specifying a power supply terminal corresponding to a signal terminal designated for input level fixation by the circuit connectivity information on the basis of terminal correspondence information, a second step of specifying a power supply voltage corresponding to the power supply terminal specified at the first step on the basis of the power supply information, and a third step of routing a power supply line of the power supply voltage specified at the second step to the signal terminal for input level fixation and thus connecting them, are carried out. Thus, connection processing to connect the signal terminal for input level fixation and the power supply line can be automatically carried out and a design period for a multi-power supply semiconductor integrated circuit can be reduced.