The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2008
Filed:
Aug. 18, 2003
Steven L. Scott, Eau Claire, WI (US);
Gregory J. Faanes, Eau Claire, WI (US);
Brick Stephenson, Chippewa Falls, WI (US);
William T. Moore, Jr., Elk Mound, WI (US);
James R. Kohn, Inver Grove Heights, MN (US);
Steven L. Scott, Eau Claire, WI (US);
Gregory J. Faanes, Eau Claire, WI (US);
Brick Stephenson, Chippewa Falls, WI (US);
William T. Moore, Jr., Elk Mound, WI (US);
James R. Kohn, Inver Grove Heights, MN (US);
Cray Inc., Seattle, WA (US);
Abstract
A method and apparatus to provide specifiable ordering between and among vector and scalar operations within a single streaming processor (SSP) via a local synchronization (Lsync) instruction that operates within a relaxed memory consistency model. Various aspects of that relaxed memory consistency model are described. Further, a combined memory synchronization and barrier synchronization (Msync) for a multistreaming processor (MSP) system is described. Also, a global synchronization (Gsync) instruction provides synchronization even outside a single MSP system is described. Advantageously, the pipeline or queue of pending memory requests does not need to be drained before the synchronization operation, nor is it required to refrain from determining addresses for and inserting subsequent memory accesses into the pipeline.