The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2008

Filed:

Oct. 09, 2007
Applicants:

Tracy Autry, Trabuco Canyon, CA (US);

Steven G. Kelly, Melrose, MA (US);

Inventors:

Tracy Autry, Trabuco Canyon, CA (US);

Steven G. Kelly, Melrose, MA (US);

Assignee:

Microsemi Corporation, Irvine, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/00 (2006.01); H01L 23/535 (2006.01); H01L 23/58 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between −55° C. to 300° C. The present invention can also tolerate continuous operation at 300° C., due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.


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