The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 2008
Filed:
Mar. 07, 2003
William C. Moyer, Dripping Springs, TX (US);
Joseph C. Circello, Phoenix, AZ (US);
Craig D. Shaw, Austin, TX (US);
William C. Moyer, Dripping Springs, TX (US);
Joseph C. Circello, Phoenix, AZ (US);
Craig D. Shaw, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A flexible peripheral access protection mechanism within a data processing system (). In one embodiment, each master () within the data processing system () includes a corresponding privilege level modifier () and corresponding trust attributes () for particular bus access types (e.g. read and write accesses). Also, in one embodiment, each peripheral () within the data processing system () includes a corresponding trust attribute (), write protect indicator (), and a privilege protect indicator (). Therefore, in one embodiment, a bus access by a bus master to a peripheral is allowed when the bus master has the appropriate privilege level and appropriate level of trust required by the peripheral (and the peripheral is not write protected, if the bus access is a write access). Also, through the use of the privilege level modifiers, a the bus master can be forced to a particular privilege level for a particular bus access.