Timing generation circuit for display apparatus and display apparatus incorporating the same

Abstract

A timing generation circuit () is formed integrally on the same glass substrate () together with a display area section () similarly to an H driver (U) and a V driver (), and timing pulses to be used by the H driver (U) and the V driver () are produced based on timing data produced by a shift register (U) of the H driver (U) and a shift register (A) of the V driver (). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated.