The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 2008
Filed:
Apr. 24, 2007
Bumha Lee, Pleasanton, CA (US);
Sing W. Chin, Alameda, CA (US);
Bumha Lee, Pleasanton, CA (US);
Sing W. Chin, Alameda, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A duty cycle stabilizer circuit () receiving an input clock signal and generating an output clock signal having a first duty cycle includes a leading edge pulse generator () and a pulse width extender circuit (). The pulse generator generates a first clock pulse (V) having a leading edge triggered by the leading edge of the input clock signal and a first pulse width. The pulse width extender circuit generates a second clock pulse (V) having a leading edge triggered by the leading edge of the first clock pulse and a pulse width being stretched to the desired duty cycle. The duty cycle stabilizer further includes a buffer () providing the output clock signal having the first duty cycle, a charge pump () receiving the output clock signal directly and a differential amplifier () generating an output signal for controlling the pulse width of the first and second clock pulses.