The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 2008
Filed:
Jun. 08, 2004
Neeraj Anil Pendse, Mountain View, CA (US);
Jia Liu, San Jose, CA (US);
Jitendra Mohan, Santa Clara, CA (US);
Bruce Carlton Roberts, San Jose, CA (US);
Luu Thanh Nguyen, Sunnyvale, CA (US);
William Paul Mazotti, San Martin, CA (US);
Neeraj Anil Pendse, Mountain View, CA (US);
Jia Liu, San Jose, CA (US);
Jitendra Mohan, Santa Clara, CA (US);
Bruce Carlton Roberts, San Jose, CA (US);
Luu Thanh Nguyen, Sunnyvale, CA (US);
William Paul Mazotti, San Martin, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.