Direct tunneling semiconductor memory device and fabrication process thereof

Abstract

A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.