The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2008
Filed:
Jan. 15, 2008
Ravi Sunkavalli, Milpitas, CA (US);
Hare Krishna Verma, Cupertino, CA (US);
Sudip Nag, San Jose, CA (US);
Elliott Delaye, San Jose, CA (US);
Ravi Sunkavalli, Milpitas, CA (US);
Hare Krishna Verma, Cupertino, CA (US);
Sudip Nag, San Jose, CA (US);
Elliott Delaye, San Jose, CA (US);
CSwitch Corporation, Santa Clara, CA (US);
Abstract
Logic design apparatus and method provides serial multiplexer chains in a programmable logic fabric, each element in the chain either selects output of block, or passes output from earlier element of the chain. Select line is a decoder structure or output from configurable function generator that is configured at power-on to create correct selection. Using such structure, larger multiplexer, including priority multiplexers, tristate buses or larger look-up tables (LUTs) can be created. These novel structures can implement priority, non-priority or tristate multiplexers.