The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2008

Filed:

Mar. 12, 2004
Applicants:

Gregg W. Frey, Issaquan, WA (US);

Grazyna M. Palczewska, Bellevue, WA (US);

Stephen R. Barnes, Bellevue, WA (US);

Mirsaid Bolorforosh, Portola Valley, CA (US);

Inventors:

Gregg W. Frey, Issaquan, WA (US);

Grazyna M. Palczewska, Bellevue, WA (US);

Stephen R. Barnes, Bellevue, WA (US);

Mirsaid Bolorforosh, Portola Valley, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02N 1/04 (2006.01); A61B 8/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

Electrical interconnects are provided for CMUTs. For example, electrodes within the silicon substrate, such as the electrodes at the bottom of the void below membranes, are interconnected together within the substrate. The interconnected electrode may then be used as the grounding electrode. By providing interconnection within the substrate and below the membranes, space for vias and the associated connection between the electrodes on an exposed surface of the substrate is minimized. As another example, an electrical conductor is formed on the side of the silicon substrate rather than the top of the substrate. Conductors on the side may allow routing signals from a top surface to a bottom surface without large wire bonding pads. Alternatively, conductors on the edge provide additional space for wire bonding pads. As yet another example, polymer material used as a matching or protection layer is formed on the top surface of the CMUT with electrical traces routed within the polymer. By using multiple layers of polymer, multiple layers of electrical conductors may be routed without interference.


Find Patent Forward Citations

Loading…