The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2008

Filed:

Dec. 05, 2005
Applicant:

Han Choon Lee, Seoul, KR;

Inventor:

Han Choon Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device manufacturing method wherein a metal suicide layer is formed via an in-situ process. The method includes forming a gate electrode on a semiconductor substrate; forming an insulation side wall at either lateral surface of the gate electrode; forming a source/drain region in a surface of the semiconductor substrate at either side of the gate electrode; forming a metal layer on the surface of the semiconductor substrate including the gate electrode; performing a plasma treatment on the metal layer; forming a capping material layer on the metal layer; performing an annealing process upon the semiconductor substrate, to form a metal silicide layer on the surface of the semiconductor substrate at positions corresponding to the gate electrode and the source/drain region; and removing the capping material layer and the metal layer remained without reaction with the gate electrode and the semiconductor substrate.


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