The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2008
Filed:
Jun. 29, 2005
Stephan Riedel, Dresden, DE;
Stefano Parascandola, Dresden, DE;
Stephan Riedel, Dresden, DE;
Stefano Parascandola, Dresden, DE;
Infineon Technologies AG, Munich, DE;
Infineon Technologies Flash GmbH & Co. KG, Dresden, DE;
Abstract
A memory layer sequence comprising a lower confinement layer (), a charge-trapping layer (), and an upper confinement layer () is applied on the main surface of a silicon substrate (). By a photolithography step, trenches running parallel at a distance from one another are etched to delimitate the active area. A trench filling () is applied by growth or deposition of dielectric material or by a selective oxidation of the substrate material. After the removal of the charge-trapping layer sequence in a peripheral area and the deposition of a gate dielectric material provided for the transistors of an addressing circuitry, wordline stacks () are formed.