The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2008

Filed:

Sep. 03, 2004
Applicants:

Marina V. Plat, San Jose, CA (US);

Calvin T. Gabriel, Cupertino, CA (US);

Christopher F. Lyons, Fremont, CA (US);

Anna M. Minvielle, San Jose, CA (US);

Inventors:

Marina V. Plat, San Jose, CA (US);

Calvin T. Gabriel, Cupertino, CA (US);

Christopher F. Lyons, Fremont, CA (US);

Anna M. Minvielle, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention discloses a system and method for designing grating structures for use in situ scatterometry during the photolithography process to detect a photoresist defect (e.g., photoresist erosion, pattern collapse or pattern bending). In one embodiment, a grating structure may be designed with a pitch or critical dimensional smaller than the one used for the semiconductor device. The pitch and the critical dimension of the grating structure may be varied. In another embodiment, the present invention provides for a feedback mechanism between the in situ scatterometry process and the photolithography process to provide an early warning of the existence of a photoresist defect. If a defect is detected on the wafer, the wafer may be sent to be re-worked or re-patterned, thereby avoiding scrapping the entire wafer.


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