The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2008
Filed:
Jun. 14, 2005
Mohandas Palathol Mana Sivadasan, Bangalore, IN;
Gajender Rohilla, Bangalore, IN;
Mohandas Palathol Mana Sivadasan, Bangalore, IN;
Gajender Rohilla, Bangalore, IN;
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A method and test circuits for measuring skew between two circuit blocks of an integrated circuit. A first data signal is propagated through a first circuit block and a first clock signal is propagated through a second circuit block. The first data signal is latched synchronized to the first clock signal after propagating the first data and clock signals. The first data signal is time shifted relative to the first clock signal until the first data signal is no longer validly latching. A second data signal is propagated through the second circuit block and a second clock signal is propagated through the first circuit block. An inversion of the second data signal synchronized to an inversion of the second clock signal is latched. Then, the second data signal is time shifted relative to the second clock signal until the inversion of the second data signal is no longer validly latching.