The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2008
Filed:
Nov. 09, 2004
Carl Cavanagh, Oakland, CA (US);
Steven A. Sivier, Fremont, CA (US);
Carl Cavanagh, Oakland, CA (US);
Steven A. Sivier, Fremont, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A system for interfacing hardware emulation to software simulation environments may include a simulation node configured to simulate a first portion of a system under test and a hardware emulation node configured to emulate a second portion of the system under test. The hardware emulation node may also be configured to exchange simulation information (such as representations of signal values obtained as output from the emulated portion of the system under test) with the simulation node. The hardware emulation node may contain a field programmable gate array devices (FPGA) configured to perform the hardware emulation. The FPGA may be mounted on an expansion board, such as a PCI (Peripheral Component Interconnect) board.