The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2008

Filed:

Jan. 10, 2006
Applicant:

Hiroshi Ohki, Tokyo, JP;

Inventor:

Hiroshi Ohki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

The difficulty of miniaturization of large-scale integrated circuits in electric devices based on the conventional techniques involving three-dimensional device structures or the introduction of novel materials is solved. Wiresandare disposed to intersect one another in midair in a matrix. The ends of the wiresandin midair are designed to be in direct contact with the insides of a package which contains a semiconductor device so that electrical connection and/or physical support can be acquired. Cross pointwhere wiresandare in contact with each other is a region which has current switching function similar to the function of a channel of a common MOSFET. Cross pointis a region where base wirefunctioning as a substrate and gate electrode wirefunctioning as a control electrode (gate electrode) intersect in contact with one another, or a region where base wireand a lead wire 4 overlap. The diameter and length of the wires as well as the distance therebetween can be designed as desired based on desired device specifications. The semiconductor device is insulated by gas (which is sealed with resin e.g. as the case may be) or vacuum except for an isolation region formed in base wire


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