The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2008

Filed:

Nov. 23, 2004
Applicants:

Jon M. Huppenthal, Colorado Springs, CO (US);

Thomas R. Seeman, Colorado Springs, CO (US);

Lee A. Burton, Divide, CO (US);

Inventors:

Jon M. Huppenthal, Colorado Springs, CO (US);

Thomas R. Seeman, Colorado Springs, CO (US);

Lee A. Burton, Divide, CO (US);

Assignee:

SRC Computers, Inc., Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A switch/network adapter port ('SNAP') for clustered computers employing multi-adaptive processor ('MAP™', a trademark of SRC Computers, Inc.) elements in a dual in-line memory module (“DIMM”) or Rambus™ in-line memory module (“RIMM”) format to significantly enhance data transfer rates over that otherwise available through use of the standard peripheral component interconnect (“PCI”) bus. Particularly disclosed is a microprocessor based computer system utilizing either a DIMM or RIMM physical format processor element for the purpose of implementing a connection to an external switch, network, or other device. In a particular embodiment, connections may be provided to either the PCI, accelerated graphics port (“AGP”) or system maintenance (“SM”) bus for purposes of passing control information to the host microprocessor or other control chips. The field programmable gate array (“FPGA”) based processing elements have the capability to alter data passing through it to and from an external interconnect fabric or device.


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