The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2008
Filed:
Apr. 27, 2005
Prashant Choudhary, San Jose, CA (US);
Venugopal Balasubramonian, Campbell, CA (US);
Jishnu Bhattacharjee, San Jose, CA (US);
Debanjan Mukherjee, San Jose, CA (US);
Abhijit Phanse, Cupertino, CA (US);
Abhijit Shanbhag, Sunnyvale, CA (US);
Qian Yu, Santa Clara, CA (US);
Prashant Choudhary, San Jose, CA (US);
Venugopal Balasubramonian, Campbell, CA (US);
Jishnu Bhattacharjee, San Jose, CA (US);
Debanjan Mukherjee, San Jose, CA (US);
Abhijit Phanse, Cupertino, CA (US);
Abhijit Shanbhag, Sunnyvale, CA (US);
Qian Yu, Santa Clara, CA (US);
Inphi Corporation, Westlake Village, CA (US);
Abstract
A continuous time electronic dispersion compensation architecture using feed forward equalization and a non-linear decision feedback equalization forms an output signal by a linear combination of successively delayed versions of the input signal and the sliced output signal weighted by appropriate coefficients. A selected number of taps in the mixer used to generate a corresponding number of coefficients for use in the feed forward equalizer are held to a selected voltage to ensure that the coefficients associated with these two taps do not drift. This causes the other coefficients to converge to a unique minimum square error value. In one embodiment the selected voltage is the maximum system voltage.