The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2008
Filed:
Aug. 12, 2005
Shuming Xu, Schnecksville, PA (US);
Jacek Korec, Sunrise, FL (US);
Shuming Xu, Schnecksville, PA (US);
Jacek Korec, Sunrise, FL (US);
Cicion Semiconductor Device Corp., Bethlehem, PA (US);
Abstract
A LDMOS transistor comprises a trench formed through the epitaxial layer at least to the top surface of the substrate, the trench having a bottom surface and a sidewall contacting the source region and the portion of the channel region extending under the source region. A first insulating layer is formed over the upper surface and sidewall surfaces of the conductive gate. A continuous layer of conductive material forming a source contact and a gate shield electrode is formed along the bottom surface and the sidewall of the trench and over the first insulating layer to cover the top and sidewall surfaces of the conductive gate. A second insulating layer is formed over an active area of the transistor, including over the continuous layer of conductive material and filling the trench. A drain electrode can extend over the second insulating layer to substantially cover the active area.