The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2008
Filed:
Aug. 31, 2006
Paul J. Schuele, Washougal, WA (US);
Mark A. Crowder, Portland, OR (US);
Apostolos T. Voutsas, Portland, OR (US);
Hidayat Kisdarjono, Vancouver, WA (US);
Paul J. Schuele, Washougal, WA (US);
Mark A. Crowder, Portland, OR (US);
Apostolos T. Voutsas, Portland, OR (US);
Hidayat Kisdarjono, Vancouver, WA (US);
Sharp Laboratories of America, Inc., Camas, WA (US);
Abstract
A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.