Low-voltage cmos circuits for analog decoders

Abstract

Low-voltage CMOS (Complementary Metal Oxide Semiconductor) circuits, suitable for analog decoders, for example, are provided. The circuits include multiplier modules that receive first input signals and respective ones of a plurality of second input signals. Each multiplier module generates as output signals products of the first input signals and its respective second input signals. Dummy multiplier modules that respectively correspond to the multiplier modules receive the second input signals, and each dummy multiplier module forms products of the second input signal of its corresponding multiplier module and the other second input signals. The dummy multiplier modules reduce the overall voltage requirements of the circuit, thereby providing for low-voltage operation. In some embodiments, a connectivity module receives output signals from the multiplier modules and generates as output signals sums of predetermined ones of the output signals, and a renormalization module receives and normalizes the output signals from the connectivity module to generate output signals that sum to a predetermined unit value.