The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2008

Filed:

Sep. 29, 2004
Applicants:

Eunice Y. D. Hao, Saratoga, CA (US);

Tony K. Ngai, Saratoga, CA (US);

Jennifer Wong, Fremont, CA (US);

Alvin Y. Ching, Sunnyvale, CA (US);

Inventors:

Eunice Y. D. Hao, Saratoga, CA (US);

Tony K. Ngai, Saratoga, CA (US);

Jennifer Wong, Fremont, CA (US);

Alvin Y. Ching, Sunnyvale, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for configuring a programmable logic device to operate at a plurality of clock frequencies comprising configurable programmable self-timed delay circuits and associated configuration software. The configurable IC clock frequencies increase device performance and manufacturing yield.


Find Patent Forward Citations

Hao, Eunice Y. D.. (2008). Method and apparatus for configuring the operating speed of a programmable logic device through a self-timed reference circuit (U.S. Patent No. 7417918). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7417918

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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