The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2008

Filed:

Feb. 07, 2007
Applicants:

Seiro Imai, Yokohama, JP;

Yukihiro Fujimoto, Yokohama, JP;

Inventors:

Seiro Imai, Yokohama, JP;

Yukihiro Fujimoto, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device is disclosed, which includes a first SRAM cell which includes cross-connected first and second inverters having first and second nodes, a first transistor connected between a first bit line and the first node and having a gate connected to a first write word line, a second transistor connected between a second bit line and the second node and having a gate connected to the first write word line, a third transistor having a gate connected to the second node, a fourth transistor connected between the first bit line and the third transistor and having a gate connected to a read word line, and a second SRAM cell which includes fifth-eighth transistors corresponding to the first-fourth transistors and has substantially the same configuration as the first SRAM, wherein the drains of the fourth and eighth transistors are connected to the first and second bit lines, respectively.


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