The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2008

Filed:

Nov. 10, 2004
Applicants:

Peter Pius Gutberlet, Wilsonville, OR (US);

Andres R. Takach, Wilsonville, OR (US);

Bryan Darrell Bowyer, Newberg, OR (US);

Inventors:

Peter Pius Gutberlet, Wilsonville, OR (US);

Andres R. Takach, Wilsonville, OR (US);

Bryan Darrell Bowyer, Newberg, OR (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus for analyzing and processing loops within an integrated circuit design are described. According to one embodiment, the processing comprises unrolling loops. In another embodiment, the processing comprises pipelining loops. In yet another embodiment, the processing comprises merging loops. In any of the disclosed embodiments, loops comprise independent loops, dependent loops or some combination thereof. Other embodiments for processing loops are disclosed, as well as integrated circuits and circuit design databases resulting from the disclosed methods. Computer-executable media storing instructions for performing the disclosed methods are also disclosed.


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