The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2008
Filed:
Feb. 03, 2005
Shoichi Mimura, Hirakata, JP;
Hirotsugu Fusayasu, Uji, JP;
Miyoko Irikiin, Amagasaki, JP;
Seiji Hamada, Osaka, JP;
Shoichi Mimura, Hirakata, JP;
Hirotsugu Fusayasu, Uji, JP;
Miyoko Irikiin, Amagasaki, JP;
Seiji Hamada, Osaka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A printed wiring board design method including the steps of designing placement and wiring for circuit components based on circuit information on a mounting surface of the board; excluding a placement region and a wiring region for the circuit components from the mounting surface to thereby calculate a placement and wiring enable region for an EMC component in which the EMC component can be placed and wiring can be laid down; and calculating the placement and wiring range for the EMC component based on an EMC design rule from the calculated placement and wiring enable region for the EMC component. Thus, a printed wiring board design method is provided in which placement of and wiring for a new bypass capacitor or the like can be implemented and a region satisfying restraint items from the design rule can be clearly displayed as a new input enable region on a CAD screen.