High-speed input signal receiver circuit

Abstract

An input integrating circuit and a differential amplifier circuit are provided in a receiver circuit which samples a pair of differential input signals, detects the levels of said pair of input signals, and latches the detected levels. The above-mentioned input integrating circuit further includes: a pair of input transistors receiving the pair of input signals at respective gates thereof; a switch transistor becoming conducting in response to a sampling clock in a sampling period so as to supply a discharge current to a common source terminal of the pair of input transistors; and a precharge circuit precharging drain terminals of the pair of input transistors in a precharge period. The input integrating circuit discharges the capacitor of the drain terminals by the discharge current in the sampling period succeeding the precharge period. The differential amplifier circuit amplifies the drain terminals of the input integrating circuit.