The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2008
Filed:
Nov. 12, 2004
Kanad Chakraborty, Bridgewater, NJ (US);
Thaddeus J. Gabara, Murray Hill, NJ (US);
Kevin R. Stiles, Orefield, PA (US);
Bingxiong Xu, Whitehall, PA (US);
Kanad Chakraborty, Bridgewater, NJ (US);
Thaddeus J. Gabara, Murray Hill, NJ (US);
Kevin R. Stiles, Orefield, PA (US);
Bingxiong Xu, Whitehall, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A static latch circuit is used to suppress crosstalk glitch in a synchronous digital integrated circuit. A static latch is inserted into a selected victim net, and the net is examined if crosstalk glitch induced in the selected victim net is sufficiently suppressed. If not, then the selected victim net is examined to check whether the crosstalk glitch is primarily due to propagated noise from an earlier stage or due to noise injected in the selected victim net. If the crosstalk glitch is propagated from an earlier stage, then a second static latch is inserted before the state in which the first static latch is inserted. Alternatively, another static latch may be inserted in the selected victim net. Cell libraries including a variety of static latch circuit architectures can be designed.