The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2008
Filed:
Nov. 18, 2004
Hugh Sung-ki O, Fremont, CA (US);
Chih-ching Shih, Pleasanton, CA (US);
Yow-juang Bill Liu, San Jose, CA (US);
Cheng-hsiung Huang, Cupertino, CA (US);
Wei-guang Wu, Los Angeles, CA (US);
Billy Jow-tai Kwong, San Francisco, CA (US);
Yu-cheng Richard Gao, San Jose, CA (US);
Hugh Sung-Ki O, Fremont, CA (US);
Chih-Ching Shih, Pleasanton, CA (US);
Yow-Juang Bill Liu, San Jose, CA (US);
Cheng-Hsiung Huang, Cupertino, CA (US);
Wei-Guang Wu, Los Angeles, CA (US);
Billy Jow-Tai Kwong, San Francisco, CA (US);
Yu-Cheng Richard Gao, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
The present invention provides an ESD device for protecting thin oxide layers in transistors or capacitors in an integrated circuit. In one embodiment, the ESD device includes a silicon-controlled rectifier (SCR), the SCR including a PNP bipolar transistor and a NPN bipolar transistor. The ESD device further includes first and second trigger devices coupled to the SCR and configured to simultaneously turn on the PNP bipolar transistor and the NPN bipolar transistor in response to an ESD pulse on the ESD device. The base of the NPN bipolar transistor is floating to allow a first external resistor to be connected between the base and emitter of the NPN bipolar transistor. A second external resistor can be connected between the base and emitter of the PNP bipolar transistor.