The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2008
Filed:
Mar. 08, 2007
Dhruv Jain, Woodland Hills, CA (US);
Gopal Raghavan, Thousand Oaks, CA (US);
Jeffrey C. Yen, Camarillo, CA (US);
Carl W. Pobanz, Topanga, CA (US);
Dhruv Jain, Woodland Hills, CA (US);
Gopal Raghavan, Thousand Oaks, CA (US);
Jeffrey C. Yen, Camarillo, CA (US);
Carl W. Pobanz, Topanga, CA (US);
Inphi Corporation, Westlake Village, CA (US);
Abstract
A master-slave flip-flop comprises master and slave latches, with the data output of the master latch connected to the data input of the slave latch. The latches receive clock signals CKM and CKS at their respective clock inputs; each latch is transparent when its clock signal is in a first state and latches a signal applied to its input when its clock signal is in a second state. A clock buffer receives an input clock CKand generates nominally complementary clock signals CKM and CKS such that one latch is latched while the other is transparent. The clock buffer is arranged to skew CKS with respect to CKM such that the slave latch is made transparent earlier than it would without the skew, making the minimum delay (t) between the toggling of CKand a resulting change at the slave latch's output less than it would otherwise be.