The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2008

Filed:

Dec. 01, 2004
Applicant:

Hitoshi Makishima, Tokyo, JP;

Inventor:

Hitoshi Makishima, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a level shifting circuit, by supplying current to a gate resistor, a bias is applied to a gate of a transistor. Further, current corresponding to the current which flowed through the gate resistor flows through a first current path of a current mirror circuit, and the current mirror circuit functions to supply current corresponding to the current which flowed through the gate resistor to a source of the transistor. Therefore, current corresponding to the current which flowed through the gate resistor is supplied to an output resistor and it is possible to output a voltage in response to a voltage drop related to the supplied current. Therefore, level shifting can be performed to an input signal for outputting.


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Makishima, Hitoshi. (2008). Output circuit with signal level shift (U.S. Patent No. 7408389). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7408389

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