The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2008
Filed:
Nov. 21, 2005
Kenneth L. Devries, Hopewell Junction, NY (US);
Nancy Anne Greco, LaGrangeville, NY (US);
Joan Preston, Wimberley, TX (US);
Stephen Larry Runyon, Pflugerville, TX (US);
Kenneth L. DeVries, Hopewell Junction, NY (US);
Nancy Anne Greco, LaGrangeville, NY (US);
Joan Preston, Wimberley, TX (US);
Stephen Larry Runyon, Pflugerville, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.