The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2008

Filed:

Aug. 01, 2007
Applicants:

Ahmad R. Ansari, San Jose, CA (US);

Mehul R. Vashi, San Jose, CA (US);

Nigel G. Herron, Los Gatos, CA (US);

Stephen M. Douglass, Saratoga, CA (US);

Inventors:

Ahmad R. Ansari, San Jose, CA (US);

Mehul R. Vashi, San Jose, CA (US);

Nigel G. Herron, Los Gatos, CA (US);

Stephen M. Douglass, Saratoga, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/45 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for generating a test program for an integrated circuit having an embedded processor. One embodiment has a system which includes an embedded microprocessor; a plurality of assembly language instructions stored in a memory, where the assembly language instructions substantially exercise a critical path or a path closest to the critical path in the embedded microprocessor; and programmable test circuitry having a programmable clock circuit for providing a multiplied clock signal to the embedded microprocessor in order to execute the assembly language instructions.


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