The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7406571 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 29, 2008

Filed:

Feb. 09, 2006
Applicant:

Nobuyuki Harada, Sagamihara, JP;

Inventor:

Nobuyuki Harada, Sagamihara, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory system including a bus, a memory, a memory controller, a first devicehaving a cache, and a second device, all connected to the bus, wherein the memory controller includes a bufferfor temporarily storing cache data and write data that the second device writes in the memory. The buffer of the memory controller temporarily stores cached data and the write data to be written on write access to the memory by the second device, which enables maintenance of data coherency while avoiding a write access retry by the second device.


Find Patent Forward Citations

Harada, Nobuyuki. (2008). Memory system and method for controlling the same, and method for maintaining data coherency (U.S. Patent No. 7406571). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7406571

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