The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2008
Filed:
Nov. 08, 2002
Harshad Nakil, San Jose, CA (US);
Rajashekar Reddy, Santa Clara, CA (US);
Hampapur Ajay, San Jose, CA (US);
Nipa Kumar, Santa Clara, CA (US);
Radesh Manian, San Jose, CA (US);
Harshad Nakil, San Jose, CA (US);
Rajashekar Reddy, Santa Clara, CA (US);
Hampapur Ajay, San Jose, CA (US);
Nipa Kumar, Santa Clara, CA (US);
Radesh Manian, San Jose, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
A system and method for improving the speed of packet switching in a routing platform that maps shared I/O memory into two address spaces. The first address space is mapped with the cache attribute and uses the cache write through attribute. Addresses in this address space are not equal to the physical address in the shared I/O memory and are translated to the physical addresses. Code executed by the CPU to switch packets utilizes the first address space to access packet data. The second address space is mapped with the non-cache attribute and addresses in this space are equal to the physical addresses in the shared I/O memory. The second address space is utilized by I/O devices when accessing shared I/O memory. Addresses of buffers for storing packet data in the shared I/O memory are converted from the first address space to the second address space when given to I/O devices.