The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2008

Filed:

Sep. 29, 2006
Applicants:

Ronald B. Hulfachor, Nashua, NH (US);

Srisai R. Seethamraju, Nashua, NH (US);

Shailesh Chitnis, Nashua, NH (US);

Inventors:

Ronald B. Hulfachor, Nashua, NH (US);

Srisai R. Seethamraju, Nashua, NH (US);

Shailesh Chitnis, Nashua, NH (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A technique that is readily implemented in monolithic integrated circuits reduces or eliminates phase glitches when switching between input reference clock signals. The technique combines a pulsed phase-difference signal and a pulsed phase-difference compensation signal to substantially attenuate a DC component of the phase-difference signal and at least partially attenuate harmonic components of the phase-difference signal. The pulsed phase-difference compensation signal is based on an indicator of a phase difference between the input reference clock signals.


Find Patent Forward Citations

Hulfachor, Ronald. (2008). Technique for switching between input clocks in a phase-locked loop (U.S. Patent No. 7405628). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7405628

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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