The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2008

Filed:

Nov. 05, 2004
Applicants:

Aaron Keiichi Horiuchi, Thornton, CO (US);

Clark Douglas Burnside, Fort Collins, CO (US);

Stephen Lamar Dixon, Fort Collins, CO (US);

David Paul Hannum, Fort Collins, CO (US);

Justin Allan Coppin, Fort Collins, CO (US);

Inventors:

Aaron Keiichi Horiuchi, Thornton, CO (US);

Clark Douglas Burnside, Fort Collins, CO (US);

Stephen LaMar Dixon, Fort Collins, CO (US);

David Paul Hannum, Fort Collins, CO (US);

Justin Allan Coppin, Fort Collins, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and methods for implementing voltage supply noise analysis for electronic circuits are disclosed. In an exemplary embodiment a computer program product executes a computer process. The computer process generates at least one spatial profile for the electronic circuit, generates at least one temporal profile for the electronic circuit, merges the at least one temporal profile and the at least one spatial profile, and determines if the electronic circuit is operating within acceptable voltage noise margins based on the merged temporal and spatial profiles.


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