The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2008
Filed:
Apr. 11, 2005
Eric W. Beach, Tucson, AZ (US);
Walter B. Meinel, Tucson, AZ (US);
Philipp Steinmann, Unterschleissheim, DE;
Eric W. Beach, Tucson, AZ (US);
Walter B. Meinel, Tucson, AZ (US);
Philipp Steinmann, Unterschleissheim, DE;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit thin film resistor structure includes a first dielectric layer (A) disposed on a semiconductor layer (), a first dummy fill layer (A) disposed on the first dielectric layer (B), a second dielectric layer (C) disposed on the first dummy fill layer (A), the second dielectric layer (B) having a first planar surface (-), a first thin film resistor () disposed on the first planar surface (-) over the first dummy fill layer (A). A first metal interconnect layer (A,B) includes a first portion (A) contacting a first head portion of the thin film resistor (). A third dielectric layer () is disposed on the thin film resistor () and the first metal interconnect layer (A,B). Preferably, the first thin film resistor () is symmetrically aligned with the first dummy fill layer (A). In the described embodiments, the first dummy fill layer is composed of metal (integrated circuit metallization).