The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2008
Filed:
Jan. 12, 2005
Takanori Sonoda, Fukuyama, JP;
Kazumasa Mitsumune, Kurashiki, JP;
Kenichiroh Abe, Fukuyama, JP;
Yushi Inoue, Fukuyama, JP;
Tsukasa Doi, Fukuyama, JP;
Takanori Sonoda, Fukuyama, JP;
Kazumasa Mitsumune, Kurashiki, JP;
Kenichiroh Abe, Fukuyama, JP;
Yushi Inoue, Fukuyama, JP;
Tsukasa Doi, Fukuyama, JP;
Sharp Kabushiki Kaisha, Osaka-shi, JP;
Abstract
It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprising the steps of: (1) forming an etching stopper film of a silicon nitride film on an entire surface including a step part on a semiconductor substrate having the step part with an aspect ratio of ≧3; (2) forming an interlayer insulation film of an impurity-doped silicate film on the silicon nitride film; and (3) performing reflow of the interlayer insulation film by a heat treatment, wherein the formation of the silicon nitride film is controlled such that the N—H bond density of the silicon nitride film is 1.0×10pieces/cmor less. According to the method for forming the interlayer insulation film of the present invention, the occurrence of the voids can be suppressed in the interlayer insulation film even if the aspect ratio of the step part formed on the semiconductor substrate is 3 or more. Also, the damage applied to the semiconductor device by reflow can be reduced.