The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2008
Filed:
Nov. 30, 2004
Peter Verwegen, Rottenburg, DE;
Peter Verwegen, Rottenburg, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A binary latch that operates as an edge-triggered flip-flop and which is LSSD-testable that comprises an edge triggered master. The binary latch comprises an edge triggered master flip-flop (), with a clock input connected to the system clock (SYS_CLK), with a data input (DI) and with an output (DO), a level sensitive scan design (LSSD) slave latch (), connected to the output (DO) of the master flip-flop (), a NAND gate () with a first input () connected to the system clock (SYS_CLK), a second input () connected to a test input (TEST) and with an output () connected to the LSSD slave latch clock input (LSSD_clk).