The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2008
Filed:
Jan. 19, 2005
Applicants:
Yoshiaki Morishita, Kanagawa, JP;
Nobuteru OH, Kanagawa, JP;
Tomoaki Isozaki, Kanagawa, JP;
Inventors:
Assignee:
NEC Electronics Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
Abstract
The integrated circuit device includes a memory chip and a logic chip. The memory chip has memory I/O pads and test pads. The test pads are placed in line at the position outer than memory I/O pads and larger than the memory I/O pads. The logic chip has logic COC I/O pads. The logic COC I/O pads are connected to the memory I/O pads.
Morishita, Yoshiaki. (2008). Integrated circuit device with multiple chips in one package (U.S. Patent No. 7400134). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7400134
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile